Product Description

• These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors.
• This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift, coupledwith offset adjust which does not degrade drift or common-mode rejection.
• The devices are also designed for high slew rate, wide bandwidth,extremely fast settling time, lowvoltageand current noise and a low 1/f noise level
• Technical sheet: https://pdf1.alldatasheet.com/datasheet-pdf/view/22740/STMICROELECTRONICS/LF357.html

• HIGH INPUT IMPEDANCE J-FET INPUT STAGE
• HIGH SPEED J-FET OP-AMPs : up to 20MHz, 50V/μs
• OFFSET VOLTAGE ADJUSTMENT DOES NOT DEGRADE DRIFT OR COMMON-MODE REJECTION AS IN MOST OF MONOLITHIC AMPLIFIERS
• INTERNAL COMPENSATION AND LARGE DIFFERENTIAL INPUT VOLTAGE CAPABILITY (UP TO VCC+)

• PRECISION HIGH SPEED INTEGRATORS
• FAST D/A AND CONVERTERS
• HIGH IMPEDANCE BUFFERS
• WIDEBAND, LOW NOISE, LOW DRIFT AMPLIFIERS
• LOGARITHIMIC AMPLIFIERS
• PHOTOCELL AMPLIFIERS
• SAMPLE AND HOLD CIRCUITS